1. Field of the Invention
This invention relates to magnetic memory devices, and more particularly, to field-inducing line configurations arranged adjacent to magnetic cell junctions.
2. Description of the Related Art
The following descriptions and examples are given as background information only.
Recently, the development of magnetic random access memory (MRAM) devices to function as viable non-volatile memory circuits has been on the forefront of microelectronic technology. In general, MRAM circuits exploit the electromagnetic properties of magnetoresistive materials to set and maintain information stored within individual magnetic memory cell junctions of the circuit. More specifically, MRAM circuits utilize magnetization direction to store information within magnetic cell junctions, and differential resistance measurements to read information from the magnetic cell junctions. An MRAM circuit generally includes one or more conductive lines with which to generate magnetic fields such that the magnetization directions of one or more magnetic cell junctions of the MRAM circuit may be set. In some embodiments, the conductive lines may be referred to as “field-inducing lines.”
Typically, the conductive lines are formed as substantially straight and uniform structures of metal spaced parallel and perpendicular to each other within a plane comprising the magnetic cell junctions. Alternatively stated, the conductive lines are generally arranged in series of columns and rows having magnetic cell junctions interposed at the overlap points of the conductive lines. In this manner, the circuit may include a plurality of memory cells arranged within an array. In some cases, the conductive lines may be referred to as “bit” and “digit” lines. “Bit” lines may refer to the conductive lines that are arranged in electrical contact with magnetic junctions and are used for both the write and read operations of the array. “Digit” lines, on the other hand, may refer to the conductive lines spaced vertically adjacent to the magnetic junctions and are used primarily during write operations of the array.
In some embodiments, an individual magnetic junction can be written to by applying current simultaneously along a bit line and a digit line corresponding to the particular magnetic junction. Such an individual magnetic junction may herein be referred to as a selected magnetic junction, or the magnetic junction intentionally targeted for a writing procedure. During the writing procedure, however, the multitude of other magnetic junctions arranged vertically adjacent to the bit line and the digit line corresponding to the selected junction will also sense current. Such magnetic junctions are herein referred to as half-selected junctions, or disturbed junctions since the magnetic field induced about them is generated from one field-inducing line rather than two field-inducing lines. Even though a smaller magnetic field is induced about these disturbed cells, variations within the magnetic junctions may allow the magnetic field induced by one current carrying line to switch the magnetization directions of one or more of the disturbed cells. Such variations may include variations in the shapes and sizes of magnetic cell junctions, as well as the presence of defects.
In some cases, the variations of the cell junctions may cause the amount of current needed to switch magnetic cell junctions in the array to vary, thereby reducing the reliability of the device. In this manner, the write selectivity of the MRAM array may be reduced. Write selectivity, as used herein, may refer to the relative difference (i.e., current margin) between the amount of current responsible for switching the magnetization of a disturbed cell and the amount of current needed to switch the magnetization of a selected cell. Consequently, a reduction in write selectivity reduces the tolerance of the current used to reliably switch selected cells without switching disturbed cells within an array. In some cases, the tolerance may be too small, allowing a false bit to be unintentionally written to one or more of the disturbed cells and in turn, decrease the functionality of the array.
Accordingly, it would be advantageous to develop an MRAM device configuration that reduces the current needed to switch magnetic directions of MRAM cell junctions. In addition, it would be advantageous to develop an MRAM device configuration that offers more accurate and uniform write selectivity within an MRAM array. Furthermore, it would be beneficial to develop a method of fabricating an MRAM device with such configurations.